| ||Format||Pages||Price|| |
|PDF (220K)||12||$25||  ADD TO CART|
|Complete Source PDF (5.4M)||256||$77||  ADD TO CART|
Cite this document
This report covers the current status of techniques for evaluation of s semiconductor epitaxial-layer thickness and resistivity. These techniques are summarized from the activity of the Task Force on Epitaxial Materials of Subcommittee VI on Semiconductors, of ASTM Committee F-1 on Materials for Electron Tubes and Semiconductor Devices.
Six general techniques are useful for layer resistivity examination. These include: (1) four-point probe resistivity testing of layers deposited on opposite conductivity substrates, (2) thermal rebalance methods based on variations of resistivity with temperature, (3) breakdown measurements on evaporated alloyed aluminum diodes, (4) point-contact breakdown measurements, (5) capacitance-voltage relationship on shallow diffused diodes, and (6) determination of junction depth following opposite conductivity diffusion.
Layer thicknesses are evaluated by an infrared reflectance technique which depends on the difference in carrier concentrations in the substrate and deposited layer. Another widely used technique involves bevel-lapping and staining, followed by microscopic examination to establish the layer thickness. Similarly, optical examination of cross-sectioned and cleaved samples is a dependable measure of the layer thickness.
Rose, A. S.
Electronic Components and Devices, Radio Corporation of America, Somerville, N. J.