SYMPOSIA PAPER Published: 01 January 1984
STP32649S

The Effect of Wafer Flatness on Yield by Off-Line Computer Simulation of the Photolithographic Process

Source

This paper describes a powerful new computer program which has the ability to directly simulate virtually all popular projection and stepper type aligners. The effects on yield of such metrologies as global wafer retilting, exposure by exposure retilting and autofocusing will be analyzed. Three point and the new seven point mirror projection aligner image plate geometries will also be characterized.

The results of several process simulations will be presented using the new program's powerful graphic displays which yield a view of wafer shape never seen before.

Author Information

Denes, L
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Details
Developed by Committee: F01
Pages: 143–159
DOI: 10.1520/STP32649S
ISBN-EB: 978-0-8031-4915-1
ISBN-13: 978-0-8031-0403-7