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    Process and Device Modeling for VLSI Structures

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    Accurate and efficient simulation of VLSI processes and device electrical characteristics can complement and in some cases eliminate costly experimental evaluation of proposed new structures. Such techniques are also potentially very useful in optimizing existing processes. The utility of process and device simulators like SUPREM, GEMINI and others depends, however, on the accuracy of their predictions. This accuracy is fundamentally linked to the physical models employed by such computer tools. This paper assesses the present status and capabilities of such programs and demonstrates by way of examples both what they can and cannot presently do. Future improvements in such simulators must come from improved physical models, especially if such tools are to be successful in predicting structural and electrical characteristics of micron and submicron size devices. Future trends and problem areas are also surveyed.


    process modeling, device modeling, VLSI devices, oxidation, diffusion, simulation

    Author Information:

    Plummer, JD
    Professor of Electrical Engineering and Associate Director of the Integrated Circuits Laboratory, Stanford University, Stanford, CA

    Committee/Subcommittee: F01.19

    DOI: 10.1520/STP32641S