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    Low Temperature and Low Pressure Silicon Epitaxy by Plasma-Enhanced CVD

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    This paper reviews the most recent results obtained using a very low pressure, plasma enhanced chemical vapor deposition technique for low temperature (650–800°C) silicon epitaxy. Initial results on autodoping studies and on p-n junctions and MOS transistors fabricated in these films are briefly discussed.


    silicon epitaxy, autodoping, channel mobility, buried layers

    Author Information:

    Reif, R
    Associate Professor of Electrical Engineering, Massachusetts Institute of Technology, Cambridge, MA

    Committee/Subcommittee: F01.06

    DOI: 10.1520/STP25737S