Formerly under the jurisdiction of Committee F01 on Electronics, this practice was withdrawn in June 2008 in accordance with section 10.5.3.1 of the Regulations Governing ASTM Technical Committees, which requires that standards shall be updated by the end of the eighth year since the last approval date.
1.1 This destructive test method determines whether a given sample of semi-insulating gallium arsenide (GaAs) will remain semi-insulating after exposure to the high temperatures normally required for the activation of implanted layers.
1.2 The underlying assumption is that other wafers of GaAs, whose manufacturing history was the same as the wafer from which the test sample was taken, will respond to high temperatures in like manner.
1.3 The emphasis in this test method is on simplicity and safety of apparatus, and on securing a measurement that is independent of the apparatus used.
1.4 This test method is directly applicable to uncapped and unimplanted samples of GaAs. However, users of this test method may extend it to capped or implanted samples, or both, in which case a controlled test of capped versus uncapped samples, or implanted versus unimplanted samples, is recommended.
1.5 This test method detects impurities "from the bulk" (that is, from within the GaAs wafer) that will likely affect the electrical behavior of devices formed on the surface of the wafer. This test method is not sensitive to surface impurities or process-induced impurities, except as interferences (see Interferences).
gallium arsenide; Hal data; semi-insulating; GaAs; stability; thermal anneal;
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