SYMPOSIA PAPER Published: 01 January 2001
STP42145S

Measurement of Stress Distributions on Silicon IC Chips Using Piezoresistive Sensors

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Structural reliability of integrated circuit chips in electronic packages continues to be a major concern due to ever-increasing die size, circuit densities, power dissipation, and operating temperatures. A powerful method for experimental evaluation of silicon die stress distributions is the use of test chips incorporating integral piezoresistive sensors. In this paper, a review is made of the state-of-the-art in the area of silicon piezoresistive stress sensor test chips. Developments in sensor theory, calibration methods, and packaging applications are presented.

Author Information

Suhling, Jeffrey, C.
Auburn University, Auburn, AL
Jaeger, Richard, C.
Auburn University, Auburn, AL
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Details
Developed by Committee: E08
Pages: 127–152
DOI: 10.1520/STP42145S
ISBN-EB: 978-0-8031-6211-2
ISBN-13: 978-0-8031-2882-8