STP804

    Defects and Carrier Lifetime in Silicon

    Published: Jan 1983


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    Abstract

    The effects of substrate cleaning, high-temperature processing, epitaxial growth, and impurities on carrier lifetime and defects in silicon are investigated. Because of the possible accumulation of particulate contamination from deionized water, there appears to be an optimum rinse time for the final substrate-cleaning step. POCl3, HCl, and back-surface damage gettering techniques improve carrier lifetime and reduce defect density, provided the samples are slow cooled. Generation lifetimes of several milliseconds are obtained from the combined use of back-surface damage and HCl or POCl3 gettering. Carrier lifetimes in epitaxial silicon can be improved by treating the substrates with a chelating solution that removes heavy metals from the surface. Epitaxial layers grown on heavily phosphorus-doped substrates have higher life-times than those grown on lightly phosphorus-doped or heavily antimony-doped substrates. Metallic impurities in the concentration range of 1011 to 1016 cm−3 can be detrimental to the carrier lifetime, and their influence can vary with the mode of incorporation and thermal history of the wafer. High-temperature gettering can mitigate the adverse effect of a fast-diffusing impurity in silicon like chromium, but it has negligible influence on a very slow diffuser like molybdenum.

    Keywords:

    defects in silicon, deep-level transient spectroscopy, carrier lifetime, deep levels in silicon, effects of defects on device performance, gettering


    Author Information:

    Rohatgi, A
    Westinghouse R&D Center, Pittsburgh, Pa.

    Rai-Choudhury, P
    Westinghouse R&D Center, Pittsburgh, Pa.


    Paper ID: STP36180S

    Committee/Subcommittee: F01.06

    DOI: 10.1520/STP36180S


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