SEDL / STP / STP960-EB / STP25753S

The Effects of Plasma Processing of Dielectric Layers on Gallium Arsenide Integrated Circuits

Vanner, KC
research scientists, Plessey Research (Caswell) Ltd., Allen Clark Research Centre, Caswell, Towcester, Northamptonshire

Cockrill, JR
research scientists, Plessey Research (Caswell) Ltd., Allen Clark Research Centre, Caswell, Towcester, Northamptonshire

Turner, JA
research scientists, Plessey Research (Caswell) Ltd., Allen Clark Research Centre, Caswell, Towcester, Northamptonshire

Pages: 21    Published: Jan 1987

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Abstract

In the commercial production of GaAs I.C.s it is essential to minimise processing induced damage to the shallow semiconducting layers of the MESFET. Currently used fabrication sequences do not involve the use of highly energetic plasma processes such as RIE under conditions which may cause surface damage as a result of ion bombardment. In the development of new fabrication technologies it is essential to ensure that device performance is not degraded by the use of such plasma processes. The use of such techniques as plasma enhanced CVD to deposit passivation or interlayer dielectrics, and subsequent patterning by plasma or reactive ion etching, may adversely affect the active layer as a result of ion or radiation bombardment, or by chemical contamination of the surface.

This paper will present results from a study of the effects of plasma processing of GaAs MESFETs in MMICs. Measurements of device performance show that assessment of FET characteristics can provide a valuable complement to diode measurements and surface analysis.