SEDL / STP / STP960-EB / STP25741S

Silicon Epitaxial Growth on N+ Substrate for CMOS Products

Swaroop, RB
Manager, Fairchild Semiconductors, Mountain View, CA

Pages: 14    Published: Jan 1987

Download this paper for $25 PDF (184K)          View License Agreement
Abstract

An N-type epitaxial layers were grown over low resisitivity N-type substrate with and without pre-epi internal gettering (IG) cycle. Epitaxy was grown using either Silicon tetrachloride (SIL) or Silicon dichloride (DCS) at 1200° and 1100°C respectively. The epitaxial structures were characterized for as-grown microdefects and electrical characteristics (minority carrier lifetimes, breakdown voltage and C-t holdtime). The results indicate that epitaxial layers grown at a low growth rate and high temperature produced a minimum density of microdefects. These defects may further be reduced during subsequent thermal cycles especially with pre-epi IG-cycle. Consequently, electrical characteristics of epi layer were also improved.