Senior engineer, Technology Reliability, IBM Microelectronics Division, Essex Jct, VT
Pages: 6 Published: Jan 2000
The advantages and challenges of a voltage step stress technique using time dependent dielectric breakdown (TDDB) as the metric are discussed for oxides in the range of 10 nm. A brief comparison is given between life stress and step stress results for oxides on the order of 10 nm. Reference is made to a more complete comparison between life stress and step stress as well as to some of the literature in which step stress changed the outcome of the life stress. Some of the challenges for thinner oxides are discussed, especially oxides of thickness less than 5 nm. An example of the step stress analysis technique is discussed on a point-by-point basis.
step stress, gate oxide, semiconductor, TDDB
Paper ID: STP13482S